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NXP Semiconductors /LPC43xx /RGU /RESET_EXT_STAT1

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Interpret as RESET_EXT_STAT1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0RESERVED 0 (CORE_RESET)CORE_RESET 0RESERVED

Description

Reset external status register 1 for PERIPH_RST

Fields

RESERVED

Reserved. Do not modify; read as logic 0.
CORE_RESET

Reset activated by CORE_RST output. Write 0 to clear. 0 = Reset not activated 1 = Reset activated
RESERVED

Reserved. Do not modify; read as logic 0.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data